IARIA Acta Medica Okayama 1942-2644 17 3-4 2024 Deep Reinforcement Learning Enabled Adaptive Virtual Machine Migration Control in Multi-Stage Information Processing Systems 116 125 EN Yukinobu Fukushima Faculty of Environmental, Life, Natural Science and Technology Okayama University Yuki Koujitani Graduate School of Natural Science and Technology Okayama University Kazutoshi Nakane Graduate School of Information Science Nagoya University Yuya Tarutani Graduate School of Engineering Osaka University Celimuge Wu Graduate School of Informatics and Engineering The Univ. of Electro-Commun. Yusheng Ji Information Systems Architecture Research Division National Institute of Informatics Tokumi Yokohira Faculty of Interdisciplinary Science and Engineering in Health Systems Okayama University Tutomu Murase Graduate School of Information Science Nagoya University This paper tackles a Virtual Machine (VM) migration control problem to maximize the progress (accuracy) of information processing tasks in multi-stage information processing systems. The conventional methods for this problem are effective only for specific situations, such as when the system load is high. In this paper, in order to adaptively achieve high accuracy in various situations, we propose a VM migration method using a Deep Reinforcement Learning (DRL) algorithm. It is difficult to directly apply a DRL algorithm to the VM migration control problem because the size of the solution space of the problem dynamically changes according to the number of VMs staying in the system while the size of the agent’s action space is fixed in DRL algorithms. To cope with this difficulty, the proposed method divides the VM migration control problem into two problems: the problem of determining only the VM distribution (i.e., the proportion of the number of VMs deployed on each edge server) and the problem of determining the locations of all the VMs so that it follows the determined VM distribution. The former problem is solved by a DRL algorithm, and the latter by a heuristic method. This approach makes it possible to apply a DRL algorithm to the VM migration control problem because the VM distribution is expressed by a vector with a fixed number of dimensions and can be directly outputted by the agent. The simulation results confirm that our proposed method can adaptively achieve quasi-optimal accuracy in various situations with different link delays, types of the information processing tasks and the number of VMs. No potential conflict of interest relevant to this article was reported.

Institute of Electrical and Electronics Engineers Acta Medica Okayama 2169-3536 12 2024 A Protection Scheme With Speech Processing Against Audio Adversarial Examples 146551 146559 EN Yuya Tarutani Faculty of Interdisciplinary Science and Engineering in Health Systems, Okayama University Taisei Yamamoto Graduate School of Interdisciplinary Science and Engineering in Health Systems, Okayama University Yukinobu Fukushima Faculty of Environmental, Life, Natural Science and Technology, Okayama University Tokumi Yokohira Faculty of Interdisciplinary Science and Engineering in Health Systems, Okayama University Machine learning technologies have improved the accuracy of speech recognition systems, and devices using those systems, such as smart speakers and AI assistants, are now in wide use. However, speech recognition systems have security vulnerabilities. In particular, a known machine learning vulnerability called audio adversarial examples (AAEs), which causes misrecognition in speech recognition systems, has become a problem. We propose a scheme for using speech processing to protect speech recognition systems from AAEs, preventing misrecognitions by slight processing of input speech that does not affect the recognition of normal speech. We use two kinds of processing: speed and frequency. Evaluation results show that the proposed scheme can reduce the success rate of attack speech to about 1% while maintaining about 85% recognition rates for normal speech. No potential conflict of interest relevant to this article was reported.

IARIA Acta Medica Okayama 2308-4413 2024 Application of a Deep Reinforcement Learning Algorithm to Virtual Machine Migration Control in Multi-Stage Information Processing Systems 13 18 EN Yukinobu Fukushima Okayama University Yuki Koujitani Okayama University Kazutoshi Nakane Nagoya University Yuta Tarutani Okayama University Celimuge Wu The Univ. of Electro-Commun. Yusheng Ji National Institute of Informatics Tokumi Yokohira Okayama University Tutomu Murase Nagoya University This paper tackles a Virtual Machine (VM) migration control problem to maximize the progress (accuracy) of information processing tasks in multi-stage information processing systems. The conventional methods for this problem (e.g., VM sweeping method and VM number averaging method) are effective only for specific situations, such as when the system load is high. In this paper, in order to achieve high accuracy in various situations, we propose a VM migration method using a Deep Reinforcement Learning (DRL) algorithm. It is difficult to directly apply a DRL algorithm to the VM migration control problem because the size of the solution space of the problem dynamically changes according to the number of VMs staying in the system while the size of the agent’s action space is fixed in DRL algorithms. Therefore, the proposed method divides the VM migration control problem into two problems: the problem of determining only the VM distribution (i.e., the proportion of the number of VMs deployed on each edge server) and the problem of determining the locations of all the VMs so that it follows the determined VM distribution. The former problem is solved by a DRL algorithm, and the latter problem is solved by a heuristic method. The simulation results confirm that our proposed method can select quasi-optimal VM locations in various situations with different link delays. No potential conflict of interest relevant to this article was reported.

Acta Medica Okayama 2002 CMOS floating gate defect detection using I/sub DDQ/ test with DC power supply superposed by AC component 417 422 EN Hiroyuki Michinishi Tokumi Yokohira Takuji Okamoto Toshifumi Kobayashi Tsutomu Hondo In this paper, we propose a new I/sub DDQ/ test method for detecting floating gate defects in CMOS ICs. In the method, an unusual increase of the supply current, caused by defects, is promoted by superposing an AC component on the DC power supply. The feasibility of the test is examined by some experiments on four DUTs with an intentionally caused defect. The results showed that our method could detect clearly all the defects, one of which may be detected by neither any functional logic test nor any conventional I/sub DDQ/ test. No potential conflict of interest relevant to this article was reported.

Acta Medica Okayama 2005 Performance Improvement of TCP using Performance Enhancing Proxies ― Effect of Premature ACK Transmission Timing on Throughput ― 7 12 EN Shigeyuki Osada Tokumi Yokohira Wang Hui Kiyohiko Okayama Nariyoshi Yamai In order to improve TCP performance, a method using a PEP (Perfonnance Enhancing Proxy) is proposed. The PEP operates on a router along a TCP connection. When a data packet arrives at the PEP, it forwards the packet to the destination host, transmits the corresponding ACK (premature ACK) to the source host in behalf of the destination host and stores the copy of the packet into its own buffer (PEP buffer) in case of the retransmission of the packet. In this paper, under the strategy which keeps the number of packets in the PEP buffer for which premature ACKs have been returned being less than or equal to a fixed threshold value (watermark value), we investigate the relation between the watermark value and the maximum throughput. Extensive simulation runs show that the simulation results are roughly classified into two cases. One case is that the maximum throughput becomes larger for larger watermark value and becomes a constant value when the watermark value is over a value. The other case is that though the maximum throughput becomes larger for lager watermark value in the same way, it reversely decreases when the watermark value is over a value. We also show that the latter (former) case is easier to occur as the propagation delay in the input side network ofthe PEP becomes smaller (larger) and the propagation delay in the output side network of the PEP becomes larger (smaller) and the PEP buffer capacity becomes smaller (larger). No potential conflict of interest relevant to this article was reported.

Acta Medica Okayama 1996 A test methodology for interconnect structures of LUT-based FPGAs 68 74 EN Hiroyuki Michinishi Tokumi Yokohira Takuji Okamoto Tomoo Inoue Hideo Fujiwara In this paper we consider testing for programmable interconnect structures of look-up table based FPGAs. The interconnect structure considered in the paper consists of interconnecting wires and programmable points (switches) to join them. As fault models, stuck-at faults of the wires, and extra-device faults and missing-device faults of the programmable points are considered. We heuristically derive test procedures for the faults and then show their validness and complexity No potential conflict of interest relevant to this article was reported.

Acta Medica Okayama 2003 Improvement of detectability for CMOS floating gate defects in supply current test 406 409 EN Hiroyuki Michinishi Tokumi Yokohira Takuji Okamoto Toshifumi Kobayashi Tsutomu Hondo We already proposed a supply current test method for detecting floating gate defects in CMOS ICs. In the method, increase of the supply current caused by defects is promoted by superposing a sinusoidal signal on the supply voltage. In this study, we propose one way to improve detectability of the method for the defects. They are detected by analyzing the frequency of supply current and judging whether secondary harmonics of the sinusoidal signal exist or not. Effectiveness of our way is confirmed by some experiments. No potential conflict of interest relevant to this article was reported.

Acta Medica Okayama 2005 A Framework for Mobile Agent Systems with the Capability of Preceding and Following Users 89 94 EN Tokumi Yokohira Kiyohiko Okayama Takashi Murakami Kayo Takarako As one of mobile agent applications, many systems which provide continuous service for users moving on a network have been proposed. In these systems, because a movement of mobile agents is performed after a user movement, users must wait for arrival of mobile agents. To reduce users' waiting time, we propose a fundamental framework for mobile agent systems where an agent can move precedently before a user movement. In our frame-work, it is assumed that computers are connected on a network and users with rewritable devices move on the network. The framework supports precedent movement ofmobile agents based on prediction using movement history of users. Because the prediction may be wrong, the framework also provides the following movement of mobile agents. Moreover, the framework provides a recovery method of mobile agents in service in case that mobile agents disappear due to problems such as their bugs. Because we provide some APIs, via which various functions of our framework are accessed, developers of mobile agent systems can easily use our framework using the APIs. We implemented an experimental agent system using the APIs and confirmed that the framework perforned correctly using the experimental system. No potential conflict of interest relevant to this article was reported.

Acta Medica Okayama 2005 A framework for mobile agent systems with the capability of preceding and following users 89 94 EN Tokumi Yokohira Kiyohiko Okayama Takashi Murakami Kayo Takarako As one of mobile agent applications, many systems which provide continuous service for users moving on a network have been proposed. In these systems, because a movement of mobile agents is performed after a user movement, users must wait for arrival of mobile agents. To reduce users' waiting time, we propose a fundamental framework for mobile agent systems where an agent can move precedently before a user movement. In our frame-work, it is assumed that computers are connected on a network and users with rewritable devices move on the network. The framework supports precedent movement ofmobile agents based on prediction using movement history of users. Because the prediction may be wrong, the framework also provides the following movement of mobile agents. Moreover, the framework provides a recovery method of mobile agents in service in case that mobile agents disappear due to problems such as their bugs. Because we provide some APIs, via which various functions of our framework are accessed, developers of mobile agent systems can easily use our framework using the APIs. We implemented an experimental agent system using the APIs and confirmed that the framework perforned correctly using the experimental system. No potential conflict of interest relevant to this article was reported.

Acta Medica Okayama 40 4 1991 Fault tolerant packet-switched network design and Its sensitivity 452 460 EN Tokumi Yokohira Masashi Sugano Takeshi Nishida Hideo Miyahara Reliability and performance for telecommunication networks have traditionally been investigated separately in spite of their close relation. A design method integrating them for a reliable packet switched network, called a proofing method, is presented. Two heuristic design approaches (max-average, max-delay-link) for optimizing network cost in the proofing method are described. To verify their effectiveness and applicability, they are compared numerically for three example network topologies. The sensitivity of these two methods is examined with respect to changes in traffic demand and in link reliability. The design sensitivity to variation of input data is examined by changing the predicted probability of link failure, and by increasing the network traffic over the predicted value. The resulting analysis shows relative insensitivity of solutions generated by the two design methods to input data No potential conflict of interest relevant to this article was reported.

Acta Medica Okayama 1997 Testing for the programming circuit of LUT-based FPGAs 242 247 EN Hiroyuki Michinishi Tokumi Yokohira Takuji Okamoto Tomoo Inoue Hideo Fujiwara The programming circuit of look-up table based FPGAs consists of two shift registers, a control circuit and a configuration memory (SRAM) cell array. Because the configuration memory cell array can be easily tested by conventional test methods for RAMs, we focus on testing for the shift registers. We show that the testing can be done by using only the faculties of the programming circuit, without using additional hardware No potential conflict of interest relevant to this article was reported.

Acta Medica Okayama 4 2001 A minimal-state processing search algorithm for satisfiability problems 2769 2774 EN Nobuo Funabiki Tokumi Yokohira Toru Nakanishi Shigeto Tajima Teruo Higashino The satisfiability problem (SAT) is a typical NP-complete problem where a wide range of applications has been studied. Given a set of variables U and a set of clauses C, the goal of SAT is to find a truth assignment to variables in U such that every clause in C is satisfied if it exits, or to derive the infeasibility otherwise. This paper presents an approximation algorithm, called a minimal-state processing search algorithm for SAT (MIPS-SAT). MIPS-SAT repeatedly transits minimal states in terms of the cost function for searching a solution through a construction stage and a refinement stage. The first stage greedily generates an initial state composed of as many satisfied clauses as possible. The second stage iteratively seeks a solution while keeping state minimality. The performance of MIPS-SAT is verified through solving DIMACS benchmark instances No potential conflict of interest relevant to this article was reported.

Acta Medica Okayama 1994 Minimum test sets for locally exhaustive testing of combinational circuits with five outputs 280 285 EN Tokumi Yokohira Toshimi Shimizu Hiroyuki Michinishi Yuji Sugiyama Takuji Okamoto In this paper, features of dependence matrices of combinational circuits with five outputs are discussed, and it is shown that a minimum test set for locally exhaustive testing of such circuits always has 2 w test patterns, where w is the maximum number of inputs on which any output depends No potential conflict of interest relevant to this article was reported.

Acta Medica Okayama 1992 Minimum Verification test set for combinational circuit 14 19 EN Hiroyuki Michinishi Tokumi Yokohira Takuji Okamoto A sufficient condition under which a minimum verification test set (MVTS) for a combinational circuit has 2w elements is derived, where w is the maximum number of inputs on which any output depends, and an algorithm to find an NVTS with 2w elements for any CUT with up to four outputs is described No potential conflict of interest relevant to this article was reported.

Acta Medica Okayama 1993 Proof that akers' algorithm for locally exhaustive testing gives minimum test sets of combinational circuits with up to four outputs 14 19 EN Hiroyuki Michinishi Tokumi Yokohira Takuji Okamoto In this paper, we prove that Akers' test generation algorithm for the locally exhaustive testing gives a minimum test set (MLTS) for every combinational circuit (CUT) with up to four outputs. That is, we clarify that Akers' test pattern generator can generate an MLTS for such CUT No potential conflict of interest relevant to this article was reported.

Faculty of Engineering, Okayama University Acta Medica Okayama 0475-0071 24 2 1990 Functional Testing of an ALU 89 98 EN Tokumi Yokohira 10.18926/15505 This paper considers a test set for an ALU with look ahead carry generators(LCGs). The ALU is logically partitioned into two groups of blocks, the group of one-bit operation units and LCG group. Each group is tested in parallel and exhaustively, independent of the other. And an easily testable design is applied to several blocks for decreasing the number of the input combinations of them. Under the easily testable design, a minimum test set for each group is generated, and the upper and lower bounds for a minimum test for the ALU are derived. The difference of the lower and upper bounds is not large, and a test set whose number of test vectors is equal to the upper bound can be easily obtained as the union of minimum test sets for two groups. Hence, the union can be used as a complete and practical test set for the ALU. No potential conflict of interest relevant to this article was reported.