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Author
Campabadal, F
Fleta, C
Key, M
Lozano, M
Martinez, C
Pellegrini, G
Rafi, J M
Ullan, M
Johansen, L G
Mohn, B
Oye, O
Solberg, A O
Stugu, B
Ciocio, A
Ely, R
Fadeyev, V
Gilchriese, M
Haber, C
Siegrist, J
Spieler, H
Vu, C
Bell, P J
Charlton, D G
Dowell, J D
Gallop, B J
Homer, R J
Jovanovic, P
Mahout, G
McMahon, T J
Wilson, J A
Barr, A J
Carter, J R
Goodrick, M J
Hill, J C
Lester, C G
Parker, M A
Robinson, D
Anghinolfi, F
Chesi, E
Jarron, P
Kaplon, J
Macpherson, A
Pernegger, H
Pritchard, T
Roe, S
Rudge, A
Weilhammer, P
Bialas, W
Dabrowski, W
Dwuznik, M
Toczek, B
Koperny, S
Bruckman, P
Gadomski, S
Gornicki, E
Malecki, P
Moszczynski, A
Stanecka, E
Szczygiel, R
Turala, M
Wolter, W
Andricek, L
Bethke, S
Hauff, D
Kudlaty, J
Lutz, G
Moser, H -G
Nisius, R
Richter, R
Schieck, J
Colijn, A-P
Cornelissen, T
Gorfine, G W
Hartjes, F G
Hessey, N P
Jong, P de
Kluit, R
Koffeman, E
Muijs, A J. M
Peeters, S J. M
Eijk, B van
Nakano, I
Tanaka, R
Dorholt, O
Danielsen, K M
Huse, T
Sandaker, H
Stapnes, S
Kundu, N
Nickerson, R B
Weidberg, A
Bohm, J
Mikestikova, M
Stastny, J
Broklova, Z
Broz, J
Dolezal, Z
Kodys, P
Kubik, P
Reznicek, P
Vorobel, V
Wilhelm, I
Cermak, P
Chren, D
Horazdovsky, T
Linhart, V
Pospisil, S
Sinor, M
Solar, M
Sopko, B
Stekl, I
Apsimon, R J
Batchelor, L E
Bizzell, J P
Falconer, N G
French, M J
Gibson, M D
Haywood, S J
Matson, R M
McMahon, S J
Morrissey, M
Murray, W J
Phillips, P W
Morrissey, M
Murray, W J
Phillips, P W
Tyndel, M
Villani, E G
Cosgrove, D P
Dorfan, D E
Grillo, A A
Kachiguine, S
Rosenbaum, F
Sadrozinski, H F. -W
Seiden, A
Spencer, E
Wilder, M
Akimoto, T
Hara, K
Tanizaki, K
Bingefors, N
Brenner, R
Ekelof, T
Eklund, L
Bernabeu, J
Civera, J V
Costa, M J
Fuster, J
Garcia, C
Garcia-Navarro, J E
Gonzalez-Sevilla, S
Lacasta, C
Llosa, G
Marti-Garcia, S
Modesto, P
Sanchez, F J
Sospedra, L
Vos, M
Abstract

The ABCD3TA is a 128-channel ASIC with binary architecture for the readout of silicon strip particle detectors in the Semiconductor Tracker of the ATLAS experiment at the Large Hadron Collider (LHC). The chip comprises fast front-end and amplitude discriminator circuits using bipolar devices, a binary pipeline for first level trigger latency, a second level derandomising buffer and data compression circuitry based on CMOS devices. It has been designed and fabricated in a BiCMOS radiation resistant process. Extensive testing of the ABCD3TA chips assembled into detector modules show that the design meets the specifications and maintains the required performance after irradiation up to a total ionising dose of 10 Mrad and a 1-MeV neutron equivalent fluence of 2×1014 n/cm2, corresponding to 10 years of operation of the LHC at its design luminosity. Wafer screening and quality assurance procedures have been developed and implemented in large volume production to ensure that the chips assembled into modules meet the rigorous acceptance criteria.

Keywords
Front-end electronics
Binary readout
Silicon strip detectors
Tracking detectors
Radiation damage
Note
Digital Object Identifier:10.1016/j.nima.2005.07.002
Published with permission from the copyright holder. This is the institute's copy, as published in Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, November 2005, Volume 552, Issue 3, Pages 292-328.
Publisher URL:http://dx.doi.org/10.1016/j.nima.2005.07.002
Direct access to Thomson Web of Science record
Copyright © 2005 Elsevier B. V. All rights reserved.
Published Date
2005-11
Publication Title
Nuclear Instruments and Methods in Physics Research Section A: Accelerators
Volume
volume552
Issue
issue3
Start Page
292
End Page
328
Content Type
Journal Article
language
英語
Refereed
True
DOI
Web of Sience KeyUT
Submission Path
nuclear_physics/1